System and method for passing data frames in a wireless network

ABSTRACT

A method is provided for receiving a data frame in an ultrawide bandwidth network. In this method, a device receives an ultrawide bandwidth signal containing a data frame. The device then performs an acquisition operation during a first preamble in the data frame, and identifies a marker after the first preamble that indicates that the first preamble has ended. After this, the device performs a signal processing operation during a second preamble in the data frame. After the training, the device then receives a header in the data frame, and then receives a payload in the data frame. By having a marker between the two preambles, this method provides a receiving device with critical information regarding the timing of the preamble section of a frame.

CROSS-REFERENCE TO RELATED PATENT DOCUMENTS

This application relies for priority on U.S. provisional applicationSer. No. 60/450,315, by William M. Shvodian et al., filed Feb. 28, 2003,entitled “PREAMBLE ARCHITECTURE FOR AN ULTRAWIDE BANDWIDTH SIGNAL” andU.S. provisional application Ser. No. 60/535,758, by William M. Shvodianet al., filed Jan. 12, 2004, entitled “DATA FRAME STRUCTURE,” thecontents of all of which are hereby incorporated by reference in theirentirety.

FIELD OF THE INVENTION

The present invention relates in general to wireless communicationsystems, such as ultrawide bandwidth (UWB) systems, including mobiletransceivers, centralized transceivers, and related equipment. Morespecifically the present invention relates to the transmission of databetween two wireless devices in a manner that allows the receivingdevice to better perform necessary functions prior to processing data.

BACKGROUND OF THE INVENTION

In wireless communications standards individual wireless devices oftensend information back and forth between each other in the form ofdiscrete frames sent in wireless signals. Each of these frames containssome information to be passed, as well as some information to allow thereceiving device to properly receive and decipher the information in theframe.

Because of differences in local clock operation and variances in signaltransmission paths, it is generally necessary for a receiving device tosynchronize the phase of an internal clock with the phase of a receivedsignal before the signal can be processed. In many implementations aframe will include a preamble that is placed at the beginning of theframe which allows the receiving device an opportunity to synchronizewith the incoming frame. This is often called acquiring or locking ontothe signal containing the incoming frame.

A preamble is generally a known, recognizable, and repeated pattern ofbits that the receiving device can look for. This pattern is oftengenerated by a formula known to both the transmitting device and thereceiving device, and which can be easily detected.

In order to successfully identify the preamble, the receiving devicemust operate using a local clock that is synchronized with the phase ofthe incoming signal. As a result, in attempting to lock onto theincoming signal, the receiving device will generally vary the phase ofits local clock, attempting to find a phase at which it can successfullydetect the bit pattern in the preamble. Once the receiving devicesuccessfully identifies the preamble, i.e., recognizes the bit patternbeing sent in the preamble, it will have successfully synchronized itslocal clock with the phase of the received data frame, and will havelocked onto the bit pattern. In a wireless device there are generallyseveral levels of synchronization. A device can synchronize to anoscillator frequency of the incoming signal, to a symbol or chip beingsent in the incoming signal, or to a series of bits being sent in theincoming signal. Generally a device will have to sequentiallysynchronize on increasing levels of the signal, building upon thesynchronization with the lower levels.

In implementation, most devices that use preambles do not initialize theformula (e.g., the polynomial) used for generating the preamble to thesame initial conditions in every frame. In other words, while a preamblewill generally contain a known and repeated bit pattern, the start ofthat bit pattern will be essentially random with respect to the start ofthe preamble. As a result, once the receiving device successfullysynchronizes with an incoming preamble, it has no way of knowing howmuch time remains before the preamble ends.

In a narrow band system, a receiver can use a carrier (i.e., energy)detection to determine when a preamble starts, and thus how much timeremains. In a UWB system, however, the signals have low signal-to-noise(SNR) ratio, meaning energy detection is generally an undesirablesolution.

This can be a problem in certain devices that require additional signalprocessing or receiver preparation before receiving information from aframe. For example, some devices may perform operations on an incomingsignal to improve signal quality. These operations can tale the form oflinear equalization, decision feedback equalization (DFE), fineautomatic gain control (AGC), and/or the use of RAKE receivers. Theseprocesses take a certain amount of time to train before they are readyto operate. And since the receiving UWB device does not know how muchtime remains in the preamble after signal lock, it cannot determinewhether there is sufficient time remaining for receiver training, AGCrefinement, signal normalization, or the like.

This can be a problem because if the receiving device starts trainingand the preamble ends before the training is completed, the receivingdevice may not be able to successfully receive the incoming data withoutan unacceptable number of errors. This can also be a problem inembodiments that continue to refine acquisition (e.g., using multipleacquisition fingers). In this situation, since the receiver doesn't knowwhen the preamble will end, it doesn't know if it has sufficient time totry and look for a better acquisition lock before it must starttraining. It then runs the risk of either wasting too much time refiningacquisition lock so that it has insufficient time for training, or itmight stop refining acquisition too early in an effort to make certainit will have enough time for training.

Accordingly, it would be desirable in the art for a solution to theproblems associated with unknown relative signal lock timing, andfurther to the problems associated with trying to allow adequate timefor receiver training when a receiving device has no way of knowing theremaining time in a preamble once signal lock is completed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying figures, where like reference numerals refer toidentical or functionally similar elements throughout the separate viewsand which together with the detailed description below are incorporatedin and form part of the specification, serve to further illustratevarious embodiments and to explain various principles and advantages inaccordance with the present invention.

FIG. 1 is a diagram showing the hierarchy of the seven-layered OSIstandard;

FIG. 2 is a diagram showing the IEEE 802 standard;

FIG. 3 is a block diagram of a wireless network according to a preferredembodiment of the present invention;

FIG. 4 is a block diagram of a superframe according to preferredembodiments of the present invention;

FIG. 5 is a block diagram of a frame according to a preferred embodimentof the present invention;

FIG. 6 is a block diagram of a frame according to another preferredembodiment of the present invention;

FIG. 7 is a diagram showing the timing of a signal containing anincoming frame and the operations performed on the incoming frame by areceiving device, according to a preferred embodiment of the presentinvention;

FIG. 8 is a block diagram of a device from the network of FIG. 3;

FIG. 9 is a block diagram of a marker detector of FIG. 8 according to apreferred embodiment of the present invention; and

FIG. 10 is a flow chart showing a frame receiving operation of thedevice of FIG. 9 according to a preferred embodiment of the presentinvention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The International Standards Organization's (ISO) Open SystemsInterconnection (OSI) standard provides a seven-layered hierarchybetween an end user and a physical device through which differentsystems can communicate. Each layer is responsible for different tasks,and the OSI standard specifies the interaction between layers, as wellas between devices complying with the standard.

FIG. 1 shows the hierarchy of the seven-layered OSI standard. As seen inFIG. 1, the OSI standard 100 includes a physical layer 110, a data linklayer 120, a network layer 130, a transport layer 140, a session layer150, a presentation layer 160, and an application layer 170.

The physical (PHY) layer 110 conveys the bit stream through the networkat the electrical, mechanical, functional, and procedural level. Itprovides the hardware means of sending and receiving data on a carrier.The data link layer 120 describes the representation of bits on thephysical medium and the format of messages on the medium, sending blocksof data (such as frames) with proper synchronization. The networkinglayer 130 handles the routing and forwarding of the data to properdestinations, maintaining and terminating connections. The transportlayer 140 manages the end-to-end control and error checking to ensurecomplete data transfer. The session layer 150 sets up, coordinates, andterminates conversations, exchanges, and dialogs between theapplications at each end. The presentation layer 160 converts incomingand outgoing data from one presentation format to another. Theapplication layer 170 is where communication partners are identified,quality of service is identified, user authentication and privacy areconsidered, and any constraints on data syntax are identified.

The IEEE 802 Committee has developed a three-layer architecture forlocal networks that roughly corresponds to the physical layer 110 andthe data link layer 120 of the OSI standard 100. FIG. 2 shows the IEEE802 standard 200.

As shown in FIG. 2, the IEEE 802 standard 200 includes a physical (PHY)layer 210, a medium access control (MAC) layer 220, and a logical linkcontrol (LLC) layer 225. The PHY layer 210 operates essentially as thePHY layer 110 in the OSI standard 100. The MAC and LLC layers 220 and225 share the functions of the data link layer 120 in the OSI standard100. The LLC layer 225 places data into frames that can be communicatedat the PHY layer 210; and the MAC layer 220 manages communication overthe data link, sending data frames and receiving acknowledgement (ACK)frames. Together the MAC and LLC layers 220 and 225 are responsible forerror checking as well as retransmission of frames that are not receivedand acknowledged.

Network

FIG. 3 is a block diagram of an exemplary wireless network 300 thatcould use the IEEE 802 standard 200. In a preferred embodiment thenetwork 300 is a wireless personal area network (WPAN), or piconet.However, it should be understood that the present invention also appliesto other settings where bandwidth is to be shared among several users,such as, for example, wireless local area networks (WLAN), or any otherappropriate wireless network.

When the term piconet is used, it refers to a network of devicesconnected in an ad hoc fashion, having one device act as a coordinator(i.e., it functions as a server) while the other devices (sometimescalled stations) follow the time allocation instructions of thecoordinator (i.e., they function as clients). One primary differencebetween the coordinator and non-coordinator devices is that thecoordinator must be able to communicate with all of the devices in thenetwork, while the various non-coordinator devices need not be able tocommunicate with all of the other non-coordinator devices.

As shown in FIG. 3, the network 300 includes a coordinator 310 and aplurality of non-coordinator devices 320. The coordinator 310 serves tocontrol the operation of the network 300. As noted above, the system ofcoordinator 310 and non-coordinator devices 320 may be called a piconet,in which case the coordinator 310 may be referred to as a piconetcoordinator (PNC). Each of the non-coordinator devices 320 must beconnected to the coordinator 310 via primary wireless links 330, and mayalso be connected to one or more other non-coordinator devices 320 viasecondary wireless links 340, also called peer-to-peer links.

In addition, although FIG. 3 shows bi-directional links between devices,they could also be unidirectional. In this case, each bi-directionallink 330, 340 could be shown as two unidirectional links, the firstgoing in one direction and the second going in the opposite direction.

In some embodiments the coordinator 310 may be the same sort of deviceas any of the non-coordinator devices 320, except with the additionalfunctionality for coordinating the system, and the requirement that itcommunicate with every device 320 in the network 300. In otherembodiments the coordinator 310 may be a separate designated controlunit that does not function as one of the devices 320.

Through the course of the following disclosure the coordinator 310 willbe considered to be a device just like the non-coordinator devices 320.However, alternate embodiments could use a dedicated coordinator 310.Furthermore, individual non-coordinator devices 320 could include thefunctional elements of a coordinator 310, but not use them, functioningas non-coordinator devices. This could be the case where any device is apotential coordinator 310, but only one actually serves that function ina given network.

Each device of the network 300 may be a different wireless device, forexample, a digital still camera, a digital video camera, a personal dataassistant (PDA), a digital music player, or other personal wirelessdevice.

The various non-coordinator devices 320 are confined to a usablephysical area 350, which is set based on the extent to which thecoordinator 310 can successfully communicate with each of thenon-coordinator devices 320. Any non-coordinator device 320 that is ableto communicate with the coordinator 310 (and vice versa) is within theusable area 350 of the network 300. As noted, however, it is notnecessary for every non-coordinator device 320 in the network 300 tocommunicate with every other non-coordinator device 320.

Typically, the coordinator 310 and the non-coordinator devices 320 in aWPAN share the same bandwidth. Accordingly, the coordinator 310coordinates the sharing of that bandwidth. Standards have been developedto establish protocols for sharing bandwidth in a wireless personal areanetwork (WPAN) setting. For example, the IEEE standard 802.15.3 providesa specification for the PHY layer 410 and the MAC layer 420 in such asetting where bandwidth is shared using a form of time division multipleaccess (TDMA). Using this standard, the MAC layer 420 defines frames andsuperframes through which the sharing of the bandwidth by the devices310, 320 is managed by the coordinator 310 and/or the non-coordinatordevices 320. This approach could also be applied to CSMA/CA embodimentsas well.

Superframes

In a preferred embodiment, the available bandwidth in a given network300 is split up in time by the coordinator 310 into a series of repeatedsuperframes. These superframes define how the available transmissiontime is split up among various tasks. Individual frames of informationare then transferred within these superframes in accordance with thetiming provided for in the superframe.

FIG. 4 is a block diagram of a superframe according to preferredembodiments of the present invention. As shown in FIG. 4, eachsuperframe 400 may include a beacon period 410, a contention accessperiod (CAP) 420, and a contention free period (CFP) 430.

The beacon period 410 is set aside for the coordinator 310 to send abeacon frame out to the non-coordinator devices 320 in the network 300.Such a beacon period 410 will include information for organizing theoperation of devices 310, 320 within the superframe 400. Eachnon-coordinator device 320 knows how to recognize a beacon 410 prior tojoining the network 300, and uses the beacon 410 both to identify anexisting network 300 and to coordinate communication within the network300. In fact, since the beacon includes a preamble, the disclosedprocess is applicable to the beacon period 410 as well as to a framepreamble.

The CAP 420 is used to transmit commands or asynchronous data across thenetwork. The CAP 420 may be eliminated in many embodiments and thesystem would then pass commands solely during the CFP 430.

The CFP 430 includes a plurality of time slots 440. These time slots 440are assigned by the coordinator 310 to a single transmitting device 310,320 and one or more receiving devices 310, 320 for transmission ofinformation between them. Generally each time slot 440 is assigned to aspecific transmitter-receiver pair, though in some cases a singletransmitter will transmit to multiple receivers at the same time. In apreferred embodiment these time slots can be used to transmitadministrative information between the coordinator 310 and one of thenon-coordinator devices 320, or may be used for transmitting isochronousnon-administrative data between devices 310, 320 in the network 300.

The superframe 400 is a fixed time construct that is repeated in time.The specific duration of the superframe 400 is described in the beacon410. In fact, the beacon 410 generally includes information regardinghow often the beacon 410 is repeated, which effectively corresponds tothe duration of the superframe 400. The beacon 410 also containsinformation regarding the network 300, such as the identity of thetransmitter and receiver of each time slot 440, and the identity of thecoordinator 310.

The system clock for the network 300 is preferably synchronized throughthe generation and reception of the beacons 410. Each non-coordinatordevice 320 will store a synchronization point time upon successfulreception of a valid beacon 410, and will then use this synchronizationpoint time to adjust its own timing.

Although not shown in FIG. 4, there are preferably guard timesinterspersed between time slots 440 in a CFP 430. Guard times are usedin TDMA systems to prevent two transmissions from overlapping in timebecause of inevitable errors in clock accuracies and differences inpropagation times based on spatial positions.

In a WPAN, the propagation time will generally be insignificant comparedto the clock accuracy. Thus the amount of guard time required ispreferably based primarily on the clock accuracy and the duration sincethe previous synchronization event. Such a synchronizing event willgenerally occur when a non-coordinator device 320 successfully receivesa beacon frame from the coordinator 310. For simplicity, a single guardtime value may be used for the entire superframe. The guard time willpreferably be placed at the end of each beacon frame and time slot.

Furthermore, although the preferred embodiment is used in a superframestructure, the present invention is equally applicable to embodimentsthat send frames outside of a superframe structure.

Frames

As noted above, signals are sent between devices in the form of frames.FIG. 5 is a block diagram of a frame according to a preferred embodimentof the present invention. Frames can be management frames, data frames,acknowledgement frames, etc. depending upon their payload.

As shown in FIG. 5, the frame 500 includes a preamble 510, a header 520,and a payload 530. Each frame 500 is preferably made up of a series ofwavelets, with information in the frame 500 being represented by thewavelets or groups of wavelets called code words. In the preferredembodiment the receiving device 310, 320 is bi-phase modulated, meaningthat one orientation of a wavelet or code word indicates a “1” and theinverted orientation of that wavelet or code word indicates a “0”.

Although not shown, the frame 500 may include one or more checksequences (e.g. a cyclic redundancy check (CRC) to check fortransmission errors. For example, the frame 500 could include a headercheck sequence at the end of the header 520 to perform a CRC on theheader 520, and/or a frame check sequence at the end of the payload 530to perform a CRC on the entire frame 500.

In the preamble 510, the transmitting device sends a known sequence ofbits, while the receiving device 310, 320 listens for this knownsequence in order to properly lock onto the signal. No substantive datais sent in the preamble 510, since the receiving device 310, 320 isstill getting its timing synchronized with that of the transmittingdevice.

In a preferred embodiment the preamble comprises a pseudo-noise (PN)sequence that can be easily and repeatably generated, and that looksrandom to prevent spectral lines. In a preferred embodiment the PNsequence is generated using a 17^(th) order polynomial (e.g., the17^(th) order trinomial: x¹⁷+x¹²+1). This can be implemented using alength 17 shift register with taps at the appropriate points leading toan XOR gate. The shift register can then be filled with a known seedvalue to start the shift register producing the PN sequence. In apreferred embodiment the start seed may be1_(—)1111_(—)1111_(—)1111_(—)1111 or 0_(—)0000_(—)0000_(—)0000_(—)0100,i.e., the appropriate bit values are placed in parallel intocorresponding shift registers.

The header 520 includes information about the intended recipient of theframe 500 and other identifying information. In the case where aplurality of frames include fragmented data, the header 520 should alsoinclude any information necessary to correctly reassemble the fragmentscontained in the plurality of frames.

The payload 530 includes the substantive information being transmittedby the frame 500. This can be data if the frame is a data frame,acknowledgement information if it is an acknowledgement frame,management information if it is a management frame, etc.

Preferably, the preamble 510 and the header 520 are of fixed size, whilethe payload 530 may vary in size. Thus, the size of a given frame 500will generally vary depending upon the size of the payload 530 itcarries.

Alternate embodiments may vary the preamble size however in somecircumstances. For example, in one preferred embodiment a fastsynchronization preamble can be used for second and subsequent packets(also called frames) sent from one device to another in a time slot. Thedevices can store acquisition and synchronization information betweenpackets in a time slot and use that stored information to achieve aquicker acquisition/synchronization, allowing for a shorter preamble. Inanother preferred embodiment, different preamble sizes can be useddepending upon signal quality (e.g., SNR). When SNR is good, a shortpreamble can be used, and when SNR is bad, a long preamble can be used.Multiple levels of preambles can also be used for varying SNRthresholds.

As noted above, however, it is desirable for the receiving device 310,320 to obtain some information regarding how much time remains in thepreamble 510 after a successful signal lock has been achieved. Thiswould allow the receiving device 310, 320 to make certain it had enoughtime to perform and the receiver preparation functions (e.g., DFEtraining) necessary before receiving a frame payload. To accommodatethis need, the preamble can be split into two preambles and anidentifiable marker provided between the two preambles.

FIG. 6 is a block diagram of a frame according to another preferredembodiment of the present invention. As noted above, the frame could bea management frame, a data frame, an acknowledgement frame, etc.depending upon their payload.

As shown in FIG. 6, the frame 600 includes a first preamble 610, asecond preamble 615, a header 520, a payload 530, and a marker sequence640. Each frame 600 is preferably made up of a series of waveletsrepresenting the bits of information in that frame 600. As noted above,the wavelets could themselves represent bits of information, or theycould be grouped together as code words to indicate bits of information.As with the frame 500 of FIG. 5, the frame 600 in FIG. 6 could have oneor more check sequences included.

The first and second preambles 610 and 615 preferably contain a knownsequence of bits, as disclosed in the embodiment disclosed in FIG. 5.The first preamble 610 should be large enough to allow a signal lockingoperation (i.e., acquisition) to be performed, and may be long enough toallow for either longer than average locking operations (e.g., due topoor signal quality, etc.), or iterative locking operations (e.g., usingmultiple acquisition fingers to improve a locking position).

The second preamble 615 should be long enough to allow the receivingdevice 310, 320 to perform any training or receiver preparationoperations required before it processes the header 520 and the payload530.

Preferably both the first and second preambles 610 and 615 are generatedin the same manner, e.g., both generated from the same polynomial. Thissimplifies implementation in the receiving device 310, 320 by onlyrequiring it to recognize one known sequence rather than two.Regardless, the second preamble 615 is preferably a known sequence sothat training can be performed more efficiently. For example, if thetraining is DFE training, such a DFE training operation requires knowndata.

In the alternative, the second preamble 615 could be referred to as atraining period and the first preamble 610 could be referred to as justthe preamble. Or the first preamble 610 could be referred to as thefirst portion of the preamble and the second preamble 615 could bereferred to as the second portion of the preamble. Regardless ofnomenclature, however, their operation would remain the same.

In a preferred embodiment the first and the second preambles 610 and 615are generated with a known 17^(th) order generator polynomial.

The header 520 and the payload 530 are preferably formed the same as inthe frame of FIG. 5.

The marker sequence 640 is a bit sequence placed between the first andsecond preambles 610 and 615 and is used to mark a known position in theframe 600. Preferably the marker sequence 640 is a bit sequence thatdoes not appear either in the preamble 610 or 615, or in the header 520.It is also preferable that the marker sequence 640 be chosen so thatstatistically it is not likely to appear in the payload 530 as well,although this requirement can be eliminated in any embodiment in whichthe receiving device 310, 320 will not try and detect marker sequence640 during the header 520 or the payload 530. The length of the markercan vary, but a marker that is a factor of two is preferable.

In particular, the marker sequence 640 should be chosen so that its bitsequence does not (or likely will not) appear during the time in whichthe receiving device 310, 320 will be trying to detect it. Also, themarker sequence 640 should be chosen so that its bit sequence will notlikely be falsely detected as present during the time in which thereceiving device 310, 320 will be trying to detect it. This is so thatthe receiving device 310, 320 will have no doubt as to when it detectsthe marker sequence 640. In general, however, any sort of marker thatcan be easily detected with a small chance of false detections can beused in place of the marker sequence 640.

The marker sequence 640 is preferably chosen such that it has extremelylow cross correlation with the data sequence that makes up the first andsecond preambles 610 and 615 (e.g., the PN sequence described above).This is so that the probability of true detection of the marker sequence640 by the receiving device 310, 320 is much greater than theprobability of false detection of the marker sequence 640 during thefirst or second preambles 610 and 615.

In a preferred embodiment the marker sequence 640 is a programmablevalue that can be either 32 or 64 bits. However in alternate embodimentsany other suitable length can be chosen that provides the necessarycharacteristics.

In preferred embodiment where the preamble is generated with thetrinomial x¹⁷+x¹²+1, the marker may be chosen, by way of example to be0001_(—)1100_(—)0011_(—)1011_(—)1001_(—)0101_(—)1001_(—)0110 or1001_(—)0110_(—)0101_(—)0110_(—)0010_(—)0011_(—)1100_(—)0111, for a32-bit marker, and 0x65f8_(—)6bcb_(—)4a9f_(—)65c8 for a 64-bit marker.However, alternate embodiments can use different markers.

Frame Processing

FIG. 7 is a diagram showing the timing of a signal containing anincoming frame and the operations performed on the incoming frame by areceiving device 310, 320, according to a preferred embodiment of thepresent invention. Although the receiving device 310, 320 may begin itsprocesses at any point during a frame 600, it is shown as starting itsreceiving process just after the frame 600 arrives by way of example.

As shown in FIG. 7, a transmitter sends a frame 600 in a wirelesssignal. The frame includes a first preamble 610, a marker sequence 640,a second preamble 615, a header 520, and a payload 530. In receiving theframe 600, the receiver performs a number of processes including a DCbias process 755, an acquisition process 760, an additional acquisitionprocess 765, a PN lock process 770, an automatic gain control (AGC)process 773, a decision feedback equalization (DFE) training process775, a header receipt process 780, and a payload receipt process 790.Also, there may be remaining portions 795 in which additional processescould be performed or in which the receiving device 310, 320 may beidle.

In the DC bias process 755, the receiving device 310, 320 observes A/Dlevels, makes determinations about the detected bias levels, andprograms digital-to-analog converters (DACs) within a receiver chain insuch a way as to minimize the signal bias. In some embodiments the DCbias process 755 may be eliminated.

In the acquisition process 760, the receiving device 310, 320 initiallylistens to the incoming signal containing the frame and tries to achievesignal lock. This is performed by trying to match the phase (andpossibly frequency) of a local clock to the phase (and possiblyfrequency) of the incoming signal. In a preferred receiving operationthe receiving device 310, 320 will achieve signal lock sometime duringthe first preamble 610.

After signal lock is obtained, the receiving device 310, 320 willpreferably begin listening for the marker sequence 640.

In the additional acquisition process 765, the receiving device 310, 320may continue to perform locking operations after initial signal lock inorder to try and improve the current signal lock. For example, if thereceiving device 310, 320 has multiple receiving fingers, it can lockonto the incoming signal with the first finger to get a successful lock,but may continue to try and find a better signal lock with one or moreother fingers. Because of the multipath nature of the wireless signalsused in the network 300, multiple phase-shifted copies of the samesignal may arrive at each receiving device 310, 320. Several of thesephase-shifted copies may be of sufficient quality for lock, but some maybe of higher quality than others. The multiple fingers can searchthrough the other multipath signals to find one that will give a bettersignal lock. In some embodiments this additional acquisition process 765can be omitted.

In the preferred embodiment, once the receiving device 310, 320 detectsthe marker sequence 640, it ends all acquisition processes (760 or 765)and begins performing the additional processes necessary for receivingthe header 520 and payload 530. In this way the marker sequence 640 actsas a time reference for the rest of the frame 600. In particular, itindicates to the receiving device 310, 320 at what time it must beginpost-acquisition operations in order to provide enough time for theircompletion before the header 520 arrives. As shown in FIG. 7, these postacquisition operations include the PN lock process 770, the AGC process773, and the DFE training process 775. Additional processes couldinclude data alignment from multiple fingers and RAKE training.

Preferably the receiving device 310, 320 will stop trying to detect themarker sequence 640 after it is successfully detected and will not startagain until a new frame is received. This is to avoid the possibility ofdetecting the marker sequence 640 in the header 520 or payload 530,which can disrupt the processing of the signal.

In the PN lock process 770, the receiving device 310, 320 locks onto thespecific PN sequence used in the second preamble 615. Although thereceiving device 310, 320 has previously locked onto the phase of theincoming signal in the acquisition process 760 (and possibly theadditional acquisition process 765), this only locked onto the clockphase, not the specific orientation of the PN sequence that makes up thefirst and second preambles 610 and 615. In the PN lock process 770, thereceiving device 310, 320 synchronizes a local PN sequence generated bya local PN generator with the received PN sequence in the secondpreamble 615. This local PN sequence is identical to the received PNsequence since it is generated in the same manner (e.g., by the samepolynomial). And by having a locally-generated copy of the PN sequence,the receiving device 310, 320 can better perform DFE or other trainingin the DFE or other training processes 775 or 795, since the datapattern is known and a locally-generated copy is available.

In the AGC process 773, the receiving device 310, 320 observes the A/Dvalues of the incoming signal and adjusts the receiver gain and/orsignal amplitude to maximize the effectiveness of the later followingdata processing stages. This process can include both an analog ACGprocess and a digital AGC process (i.e., normalization). In someembodiments the AGC process 773 may be eliminated.

In the DFE training process 775, the receiving device 310, 320 observesthe incoming data stream, which has both noise and inter-symbolinterference (ISI), and compares it to a noiseless version of the datagenerates after the PN lock process 770 has completed. Then, a set ofDFE coefficients are determined that will make the incoming data streamlook like the noise-free, ISI-free data.

Although the PN lock process 770, the AGC process 773, and the DFEtraining process 775 are shown in FIG. 7 as being performed in a serialmanner, they can also be done in part or in whole in parallel, althoughthe PN lock process 770 must be performed before the DFE trainingprocess 775. For example, in one preferred embodiment, the PN lockprocess 770 and the AGC process 773 are performed at the same time.

In addition, more or fewer training processes can be performed duringthis time. The training can enhance the ability of the receiver toprocess an incoming signal, but it is not essential.

In the header receipt process 780, the receiving device 310, 320 willreceive and process the information in the header 520 and act upon it.Likewise, in the payload receipt process 790, the receiving device 310,320 will receive and process the information in the payload 530 and actupon it.

As shown in FIG. 7, in the disclosed embodiment the frame 600 may haveone or more change points during which it can change the transmissiondata rate or the code word set it uses. In particular, the frame 600could change its data rate or code word set right after the markersequence 640, right after the second preamble 615, or right after theheader 520. In some embodiments, the instructions to change the datarate or code word set could be included in the header. In alternateembodiments, however, different points in the frame 600 can be chosen aschange points.

If the data rate or code word set of the frame 600 is changed at one ofthese change points, the receiver will change its receiving process atthe appropriate time to accommodate the different data rate or code wordset. The placement of the change point and the different rates or codeword sets could be preset for the network 300 in general, for aparticular superframe 400, or for the particular time slot 440.

In alternate embodiments, the header 520 could include a flag indicatingwhether or not the data rate or code word set should be changed rightafter the header 520. In this case, the receiver will change itsreceiving process to accommodate a different data rate or code word setonly if instructed to do so in the header 520.

By changing the data rate, the system allows the receiving device 310,320 to perform some functions at a lower data rate and others at ahigher data rate. For example, initial acquisition or training can beperformed at a low data rate to allow for fewer errors in transmission.But then a higher rate could then be used for later operation to allowfaster signal processing and data transfer. In some implementations thesecond data rate might be higher than would be feasible to use duringthe first preamble 610 because of quality of service constraints (i.e.,without trained DFE or RAKE, the higher speed would cause too many biterrors). But once DFE is properly trained, the higher data rate can beused with an acceptable number of bit errors.

By changing the code word set, the system allows the receiving device310, 320 to perform a first process using a code word set suited to thatfirst process, while performing a second process using a second codeword set better suited to the second process. For example, atransmitting device 310, 320 could start the frame 600 using a firstcode word set well suited to acquisition. Then, at one of the changepoints, the transmitting device 310, 320 could move to using a secondcode word set more suited to receiving data. The code words in thesecode word sets could be of the same size or of different sizes invarying embodiments.

FIG. 8 is a block diagram of a receiver portion of a device from thenetwork of FIG. 3. As shown in FIG. 8, each device (i.e., eachcoordinator 310 or non-coordinator device 320) includes an antenna 810,a front end 820, a code processor 830, a pseudo-noise (PN) lock circuit840, a digital feedback equalizer (DFE) circuit 850, an acquisitiondetector 860, a lock detector 870, a marker detector 880, and acontroller 890.

The antenna 810 is preferably an ultrawide bandwidth (UWB) antennaconfigured to receive UWB signals. This may be a dedicated receivingantenna or may be shared with a transmitter portion of the device 310,320.

The front end 820 is used to perform a variety of signal processingoperations on an incoming signal. This can include the DC bias process755 and an AGC process 773, as well as signal mixing integration.

The code processor 830 is used to generate local code words used fordetecting code words in the received signal.

The PN lock circuit 840 performs the PN locking process 770 during thesecond preamble 615. In doing so, it synchronizes a local PN generator(preferably contained in the PN Lock circuit 840) with the PN sequencein the second preamble 615.

The DFE circuit 850 performs DFE operations on the incoming data toremove ISI from the incoming data stream. The DFE circuit 850 preferablyperforms DFE training during the DFE training process 775 to determinethe necessary DFE parameters (i.e., the DFE coefficients) to properlyperform the DFE function on the header 520 and payload 530.

The acquisition detector 860 monitors the incoming signal and determinesthe necessary operations required to synchronize a local clock with thephase of the incoming signal. The acquisition detector may have a singlelocking finger, or may have multiple locking fingers.

The lock detector 870 monitors the incoming signal after acquisition toensure that the lock point remains sufficient to receive data. If thelock detector determines the signal on the locked finger is too weak,the finger will unlock and the acquisition process will continue forthat finger.

The marker detector 880 monitors the incoming signal to determine whenthe marker sequence 640 has been received. Preferably the markerdetector 880 begins operation when the acquisition detector 860indicates that initial lock is achieved, and stops operation when itdetects the marker sequence 640.

The controller 890 receives control signals from and supplies controlsignals to the front end 820, the code processor 830, the PN lockcircuit 840, the DFE circuit 850, the acquisition detector 860, the lockdetector 870, and the marker detector 880.

FIG. 9 is a block diagram of a marker detector 880 of FIG. 8 accordingto a preferred embodiment of the present invention. As shown in FIG. 9,the marker detector 880 includes a shift register 910, a fixed register920, and a comparing circuit 930.

The shift register 910 is the length of the marker sequence 640 andreceives the incoming signal bit-by-bit. The fixed register 920 is alsothe length of the marker sequence 640 and contains a copy of the markersequence 640. In the preferred embodiment, the shift register 910 andthe fixed register 920 are either 32 or 64 bits long. This can vary inalternate embodiments, and can even be selectable.

The comparing circuit 930 compares the contents of the shift register910 with the contents of the fixed register 920 to determine how manyerrors there are between the two. When the number of errors meets a setcriterion, the comparing circuit provides a detection signal to thecontroller 890 indicating that the marker sequence 640 has beendetected. In one preferred embodiment the set criteria is to have a32-bit marker sequence 640 have two or fewer errors, and to have a64-bit marker sequence 640 have five or fewer errors. However, this mayvary in alternate embodiments. For this reason, in preferred embodimentsthe exact number of errors is preferably programmable to account forvarying accuracy needs.

FIG. 10 is a flow chart showing a frame receiving operation of thedevice of FIG. 8 according to a preferred embodiment of the presentinvention. As shown in FIG. 10, the receiving device 310, 320 starts byperforming a DC biasing operation on the incoming signal. (Step 1005) Insome embodiments this step can be omitted.

After the DC biasing operation 1005, the receiving device 310, 320performs an acquisition operation 1010. In this embodiment, an iterativeacquisition process is performed (corresponding to the additionalacquisition process 765 in FIG. 7) to continually refine the acquisitionlock.

Specifically, once initial acquisition is achieved 1010, the receivingdevice 310, 320 determines whether the marker sequence 640 has beendetected. (Step 1015) If no marker sequence 640 has been detected, thenthe receiving device 310, 320 returns to an acquisition process (Step1010), and continues to refine the acquisition lock. In some alternateembodiments receiving device 310, 320 could simply wait after a lock todetect the marker sequence 640. In this case, i.e., when step 1015indicates no marker sequence 640 is detected, the detecting step woulditeratively return back to itself and continue trying to detect themarker sequence 640. In other alternate embodiments the receiving device310, 320 could iteratively enter into a tracking state as it continuesto try and detect the marker sequence 640.

Once the marker sequence 640 is detected in step 1015, the receivingdevice 310, 320 then performs a PN locking process (Step 1020), an AGCprocess (Step 1025), and a signal training process (Step 1030). In apreferred embodiment, this signal training 1030 is DFE training. Thesevarious signal processing and monitoring steps (1020-1030) can beperformed in varying orders and can be done either serially or inparallel. In addition, other signal processing and monitoring steps maybe included as well.

Finally, after all of the signal processing and monitoring steps areperformed, the receiving device 310, 320 receives the frame header 520(Step 1035) and then receives the frame payload 530 (Step 1040).

In addition, the process may also include a function of switching thedata rate or the code word set for receiving the frame 600. This can beperformed after detecting the marker sequence 640, i.e., after themarker sequence 640 in the frame 600 (Step 1050 a), after all of thesignal processing and monitoring operations are completed, i.e., afterthe second preamble 615 in the frame 600 (Step 1050 b), or after theheader 520 is received (Step 1050 c).

This method and apparatus according to the disclosed embodiments allowsthe receiving device 310, 320 to perform acquisition of an incomingsignal while insuring that any received frame 600 will only be processedif the receiving device 310, 320 has time after acquisition to performthe necessary training and signal processing steps necessary for properreceipt of the data contained in the frame 600.

As shown in FIG. 10, until the marker sequence 640 is received in step1015, the receiving device 310, 320 will continue to iteratively refinethe acquisition process. If, for example, the receiving device 310, 320locked onto the incoming signal during the second preamble 615 (i.e.,when there would be insufficient time for training and signal processingbefore the header 520), then it would not detect the marker sequence 640(it having already passed), and would not stop acquiring for theremainder of the frame 600 (or however long its protocol requires it tocontinue trying to acquire).

In some embodiments the receiving device 310, 320 could stop acquiringthe incoming signal after a timer indicated that a set period of timehad passed with no marker sequence 640 detected. In other embodimentsthe receiving device 310, 320 could keep acquiring through the entireframe 600 and into the next frame 600, at which time it would detect themarker sequence 640 in that second frame 600.

This requirement to detect the marker sequence 640 before moving tofurther processing may cause the receiving device 310, 320 to miss anentire frame. But it will also prevent the receiving device 310, 320from starting processing of a frame 600 before it is prepared to do so(e.g., before DFE training is finished). This reduces the chance oferrors in processing the frame and simply requires that the frame beresent. However, this is acceptable in a preferred embodiment becausethe probability of a receiving device 310, 320 missing the marker 640 ismuch lower than the probability of a receiving device 310, 320 failingto successfully receive a frame after failing to perform propertraining.

This disclosure is intended to explain how to fashion and use variousembodiments in accordance with the invention rather than to limit thetrue, intended, and fair scope and spirit thereof. The foregoingdescription is not intended to be exhaustive or to limit the inventionto the precise form disclosed. Modifications or variations are possiblein light of the above teachings. The embodiment(s) was chosen anddescribed to provide the best illustration of the principles of theinvention and its practical application, and to enable one of ordinaryskill in the art to utilize the invention in various embodiments andwith various modifications as are suited to the particular usecontemplated. All such modifications and variations are within the scopeof the invention as determined by the appended claims, as may be amendedduring the pendency of this application for patent, and all equivalentsthereof, when interpreted in accordance with the breadth to which theyare fairly, legally, and equitably entitled.

1. A method of receiving a data frame in an ultrawide bandwidth network,comprising: receiving an ultrawide bandwidth signal containing a dataframe; performing an acquisition operation during a first preamble inthe data frame; identifying a marker after the first preamble thatindicates that the first preamble has ended; performing a signalprocessing operation during a second preamble in the data frame, afteridentifying the marker; performing an automatic gain control operationon the received ultrawide bandwidth signal during the second preamble,after identifying the marker; receiving a header in the data frame,after performing the signal processing operation and after performingthe automatic gain control operation; and receiving a payload in thedata frame, after receiving the header.
 2. A method of receiving a dataframe in an ultrawide bandwidth network, as recited in claim 1, whereinthe signal processing step is a signal training step.
 3. A method ofreceiving a data frame in an ultrawide bandwidth network, as recited inclaim 1, implemented in an ultrawide bandwidth transceiver.
 4. A methodof receiving a data frame in an ultrawide bandwidth network, as recitedin claim 1, implemented in an integrated circuit.
 5. A method ofreceiving a data frame in an ultrawide bandwidth network, as recited inclaim 1, further comprising performing a pseudo-noise lock on thereceived ultrawide bandwidth signal during the second preamble, afteridentifying the marker and before receiving the header.
 6. A method ofreceiving a data frame in an ultrawide bandwidth network, as recited inclaim 1, further comprising changing a received data rate for theincoming ultrawide bandwidth signal from a first data rate to a seconddata rate after performing the acquisition operation and beforereceiving the payload.
 7. A method of receiving a data frame in anultrawide bandwidth network, as recited in claim 6, wherein the changingof the received data rate is performed during one of: after receivingthe marker and before performing the signal processing operation, afterperforming the signal processing operation and before receiving theheader, and after receiving the header and before receiving the payload.8. A method of receiving a data frame in an ultrawide bandwidth network,as recited in claim 1, further comprising changing a receiving code wordset for the incoming ultrawide bandwidth signal from a first code wordset to a second code word set after performing the acquisition operationand before receiving the payload.
 9. A method of receiving a data framein an ultrawide bandwidth network, as recited in claim 8, wherein thechanging of the receiving code word set is performed during one of:after receiving the marker and before performing the signal processingoperation, after performing the signal processing operation and beforereceiving the header, and after receiving the header and beforereceiving the payload.
 10. A method of receiving a data frame in anultrawide bandwidth network, as recited in claim 1, wherein identifyingthe marker further comprises: receiving a plurality of bits; comparingthe plurality of bits with a stored bit sequence; and identifying themarker as having been received when the plurality of received bits matchthe stored bit sequence with no more than an allowable number of bitdifferences between corresponding received bits and stored bits.
 11. Amethod of receiving a data frame in an ultrawide bandwidth network, asrecited in claim 10, wherein the allowable number of bit differences isbetween 0 and
 10. 12. A method of receiving a data frame in an ultrawidebandwidth network, as recited in claim 1, wherein the marker is asequence of N bits, N being an integer greater than 1, and wherein thesequence of N bits does not appear in either the first preamble or thesecond preamble.
 13. A receiver in an ultrawide bandwidth network,comprising: a code processor configured to receive an ultrawidebandwidth signal containing a data frame; an acquisition detectorconfigured to perform an acquisition operation during a first preamblein the data frame; a marker detector configured to identify a markerafter the first preamble that indicates that the first preamble hasended; a decision feedback equalizer circuit configured to perform areceiver training operation during a second preamble in the data frame,after identifying the marker; and an automatic gain control circuitconfigured to perform an automatic gain control operation on thereceived ultrawide bandwidth signal during the second preamble, afteridentifying the marker.
 14. A receiver in an ultrawide bandwidthnetwork, as recited in claim 13, wherein the marker detector furthercomprises: a shift register of length N for receiving a data stream; astatic register of length N for holding a marker bit value; and acomparing circuit for comparing the contents of the shift register withthe contents of the static register to determine the number of biterrors between corresponding entries in the shift register and thestatic register, wherein N is an integer greater than
 1. 15. A receiverin an ultrawide bandwidth network, as recited in claim 14, wherein thecontroller determines that the marker has been detected when the numberof bit errors determined by the comparing circuit meets an acceptedthreshold.